| 职位名称: | 数字设计工程师 | 工作地点: | 上海,上海 |
| 招聘人数: | 1 | 职能类别: | 其它类,其它职位 |
| 年龄要求: | 22-40 | 工作性质: | 全职 |
| 学历要求: | 硕士 | 工作年限: | 3年以上 |
| 外语要求: | 无要求,无要求 | 专业要求: | 无要求 |
| 性别要求: | 不限 | 计算机要求: | 无要求 |
| 有效期: | 长期有效 | 发布日期: | 2018/1/4 16:58:50 |
| 简历投递邮箱地址: | maggie.qi@photonic-tech.com | ||
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如何应聘职位: 1、注册简历，登陆人才网，投递该职位。注册简历能便于其它优秀企业查阅。 (推荐) 2、将word或ppt文档简历标明来自讯石光通讯人才网，直接投递至maggie.qi@photonic-tech.com邮箱。 |
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| 职位描述: | Job description: - This position is for a DSP algorithms / digital design engineer to build next-generation analog/mixed-signal photonic SoC chipsets. - Handle many aspects of ASIC design flow including: DSP simulations, system architecture design, RTL coding and Verification. - Participate in chip debug, validation, and marketing specifications. Qualifications: - MSEE with minimum 2-year experience or PhD with minimum 1-year experience of digital experience. - Excellent knowledge of ASIC design, such as arithmetic structure (addition, multiplication), timing analysis, DFT, meta-stability, etc. - Fundamental understanding of digital signal processing, such as FIR/IIR filter structure, error correction, decimation, signal/noise tradeoffs, channel estimation, equalization, crosstalk, and BER evaluation. - Desired usage experience of mainsteam industry-standard EDA tools, such as Matlab, Simulink, VCS/NC, Design Compiler, PrimeTime, Formality/ Conformal and Tetramax/DFT compiler. - Experience in several vertical aspects of ASIC design (front-end and back-end) will be a great plus. - Experience in mixed-signal SOC design is a plus. - Experience in uvm/perl/python/tcl scripts is a plus. |
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