| 职位描述: |
Job Description:
1. You will perform analog and mixed-signal design, characterization and evaluation of analog circuits such as:
high-speed (> 10GHz) amplifiers, wireline SERDES, PLL, PAM4, low-noise amplifiers, transmitters, power-amplifiers and power-drivers, or other baseband circuits like LDO, temp sensor, ADC, Filters, etc.
2. You will optimize the design of high-frequency (multi-gigahertz) and high-precision analog circuits.
3. Use EDA tools (Cadence, Mentor) to run simulation and function verification.
4. Guide layout engineer to optimize layout.
5. Chip debug and testing individually.
6. Design and optimize chip layout.
Qualifications:
1. MSEE in analog IC design with no less than 2 years experience.
2. Experience in Cadence EDA tools.
3. Team player with good communication skills.
4. Experience with multi-gigahertz SERDES transmitter/receiver, TIA, PLL, CDR, LNA etc. is highly preferred.
5. Desired: Knowledge of advanced circuits such as PLLs, ADCs, DACs, LNAs, drivers, NF, S-parameters, BW extension, impedance matching.
6. Desired: Experience in RF circuit design, testing, and post-silicon bring-up and evaluation.
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